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Press Release selected to provide artificial intelligence benchmark code for internationally recognised competition

Links, a Cambridge UK based deep learning company with expertise in producing low power inference circuits has been selected to develop a Speech Recognition benchmark for MLPerf, a new Machine Learning (ML) benchmarking competition backed by Google, Baidu, Intel and AMD.

MLPerf, a collaboration of tech giants and researchers from numerous universities including Harvard, Stanford and the University of California Berkeley, is aspiring to drive progress in ML by developing a suite of fair and reliable benchmarks for emerging artificial intelligence (AI) hardware and software platforms. has been selected to provide the computer code that will be the benchmark standard for the Speech Recognition division. The code is a new implementation of two AI models known as DeepSpeech 1 and DeepSpeech 2, building on models originally developed by Baidu.

Peter Baldwin CEO of said, “We are honoured to be providing the reference implementations for the Speech to Text category of MLPerf. myrtle has a world class machine learning group and we are pleased to be able to provide the code as open source so that everyone can benefit from it.”

This is the first time the AI community has come together to try and develop a series of reliable, transparent and vendor-neutral ML benchmarks to highlight performance differences between different ML algorithms and cloud configurations. The new benchmarking suite will be used to test and measure training speeds and inference times for a range of ML tasks.’s Speech Recognition benchmark is based on proven experience in this field. The company’s core R&D team have speeded up Mozilla’s Deep Speech implementations 100-fold when training on Librispeech, demonstrating their practical experience of training and deploying AI and ML algorithms.

About develops high-performance, energy-efficient computing solutions for deep learning on next-generation data centre hardware. is headquartered in Cambridge UK with engineers in the US and Europe. has brought together experienced teams of machine learning researchers, and processor and software engineers with the goal of making reconfigurable silicon the choice for compute-intensive, low latency applications in data centers. For more information, please visit and follow us on twitter.